A chip on a green circuit board
A processor on a circuit board

Research group

HW/SW Co-Design

Hardware and software, designed together from the start. Traditionally, hardware and software teams work separately, and the big problems only appear when everything comes together. HW/SW co-design designs both together.

What we work on

  • Finding the right split between hardware and software
  • Virtual prototypes that run software before the chip exists
  • Simulation tools, for example for space and automotive electronics

That way systems are ready sooner and better matched.

Virtual platforms in SystemC/TLM

In SoCRocket we built a virtual platform in SystemC/TLM-2.0 for the European Space Agency (ESA). It models the flight-proven IP cores of the LEON3 processor family at transaction level, so that architecture decisions, software development and verification can begin before there is silicon. SoCRocket is freely available under the GPL.

How much simulation speed an abstraction buys, we studied at the step from RTL to TLM (NoCArc 2014). A systematic mapping study in ACM Transactions on Design Automation of Electronic Systems (2025) sums up where SystemC/TLM is used in new research fields today.

Exploring the design space automatically

An embedded system can be split in a great many ways: which function in hardware, which in software, on how many cores, with which memory. Instead of building every variant by hand, we automate the search.

  • A universal scripting interface for SystemC (Rolf Meyer's doctoral thesis, 2024) lets models be configured, instrumented and compared from scripting languages.
  • Tools explore HW/SW partitioning and the design space of multicore systems automatically (DVCon 2017, NORCAS 2016).
  • A standard-compliant reporting and logging framework for SystemC (ACM TECS 2016) makes the results easy to evaluate.

Security early in the design

Weaknesses that only show on the finished chip are expensive. With the open framework SCA-WAL (IEEE Embedded Systems Letters, 2025), Andrija Neskovic and colleagues assess how vulnerable a design is to power side-channel attacks, already at register-transfer and netlist level. In Shift2SDV (EU, Chips Joint Undertaking, 2025 to 2028) a digital twin compares new software versions for vehicles with their predecessors and so helps to detect tampered over-the-air updates before they reach a vehicle. How functions of different criticality can safely share one piece of hardware, we studied in EMC2.

From sensor to edge

In a vehicle, sensors, control units and central computers work together. In EMDrive (DATE 2024) we contributed to a distributed computing and diagnostics architecture from sensor to edge, and in EEmotion to the hardware concept for AI-based control in automated driving. The question is always the same: which task on which hardware, so that real time, energy and safety fit together.

We teach the group's methods in the Master's course Hardware/Software Co-Design, with SystemC as the description language.

Projects

Completed projects

Team