Research staff

Andrija Neskovic, M. Sc.

Email: andrija.neskovic@uni-luebeck.de
Phone: +49 451 3101 6339
Office: Building 64, Room 115 (2nd Floor)
Address: Universität zu Lübeck
Institut für technische Informatik
Ratzeburger Allee 160
23562 Lübeck
Germany

Research Interests

As a member of the Trustworthiness Lab, I work on the modelling of trustworthy AI accelerators. System-level-modelling of hardware accelerators can provide insight into the security and safety of hardware in early design stages.

Together with Dr. Saleh Mulhem, I supervise the bachelor seminar “Trustworthy Electronics”, which is offered each semester.

If you are interested in writing a bachelor or master thesis at our institute, feel free to contact me.

For further information, please visit our lab page.

Curriculum Vitae

Since July 2021:

Research assistant at the Institute of Computer Engineering, University of Lübeck, Germany

April 2019 - March 2021:

M.Sc. Informational Technology/Computer Engineering, University of Rostock, Germany

October 2015 - March 2019:

B.Sc. Informational Technology/Computer Engineering, University of Rostock, Germany

Research

Research groupSecure Computing

Teaching

Earlier semesters (2)

SoSe 2022: Systemarchitekturen für Multimedia
SoSe 2021: Systemarchitekturen für Multimedia

Completed projects

Publications

A. Gutermann, L. Groth, A. Neskovic, S. Mulhem, and M. Berekovic
Multi-Partner Project: CeCaS Accelerator Design for Efficient Supercomputing in Automotive Systems
2026 Design, Automation & Test in Europe Conference (DATE), IEEE, Verona, Italy 2026, 2,026
URL, RIS, BibTex

L. Groth, A. Neskovic, R. Buchty, M. Berekovic, and S. Mulhem
Compatibility Ratio as a Guideline for Hardware/DNN Co-Design of Embedded Accelerators
ACM Transactions on Embedded Computing Systems, ACM, 2026, 2,026
URL, DOI, RIS, BibTex

D. Najork, A. Neskovic, H. Lin, C. Ewert, S. Dreier, M. Berekovic, R. Buchty, and M. S.
Single engine architecture for hardware root of trust
Journal of Cryptographic Engineering, Springer, 2025, 2,025
URL, DOI, RIS, BibTex

A. Neskovic, A. Kabour, M. Eltantawi, M. Berekovic, R. Meyer, and S. Mulhem
SCA-WAL: An Open-Source Framework for Power Side Channel Assessment at RTL and Netlist Level
IEEE Embedded Systems Letters, 2025, 2,025
URL, RIS, BibTex

A. Mahmoudi, A. Neskovic, C. Thermann, R. Sehm, C. Hübner, T. Plattenteich, R. Meyer, R. Buchty, et al.
A Systematic Mapping Study on SystemC/TLM Modeling Capabilities in New Research Domains
ACM Transactions on Design Automation of Electronic Systems, ACM, 2025, 2,025
URL, DOI, RIS, BibTex

C. Ewert, A. Neskovic, C. Heinz, F. Muuss, A. Treff, M. Gourjon, R. Buchty, T. Eisenbarth, et al.
Lightweight Authenticated Integration and In-Field Secure Operation of System-in-Package
ACM Transactions on Design Automation of Electronic Systems, 2025, 2,025
URL, DOI, RIS, BibTex

I. Cejic, A. Neskovic, M. Berekovic, S. Mulhem, and V. Vranjkovic
Area-Optimized RISC-V Matrix Extension Implementation for Edge Devices
33rd Telecommunications Forum (TELFOR), IEEE, 2025, 2,025
URL, RIS, BibTex

D. Hirsch, F. Hoffmann, A. Neskovic, C. Thermann, R. Buchty, M. Berekovic, and S. Mulhem
Efficient AI-based Attack Detection Methods for Sensitive Edge Devices and Systems
Advancing Edge Artificial Intelligence, River Publishers, 2,024
RIS, BibTex

S. Mulhem, C. Ewert, A. Neskovic, A. Poudel, C. Hübner, M. Berekovic, and R. Buchty
Secure Software/Hardware Hybrid In-Field Testing for System-on-Chip
2024 IFIP/IEEE 32nd International Conference on Very Large Scale Integration (VLSI-SoC), IEEE, Tanger, Morocco 2024, 2,024
URL, RIS, BibTex

A. Neskovic, S. Mulhem, A. Treff, R. Buchty, T. Eisenbarth, and M. Berekovic
SystemC Model of Power Side-Channel Attacks Against AI Accelerators: Superstition or not?
in ICCAD '23: Proceedings of the 42nd IEEE/ACM International Conference on Computer-Aided Design, IEEE/ACM, 2023, 2,023
URL, RIS, BibTex