Journal Articles
H.-J. Stolberg,
M. Berekovic, and
P. Pirsch
A Platform-Independent Methodology for Performance Estimation of Multimedia Signal Processing Applications
Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology, 41, 2,005
DOI, RIS, BibTex
A Platform-Independent Methodology for Performance Estimation of Multimedia Signal Processing Applications
Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology, 41, 2,005
DOI, RIS, BibTex
H.-J. Stolberg,
M. Berekovic,
S. Moch,
L. Friebe,
M. B. Kulaczewski,
S. Flügel,
H. Klußmann,
A. Dehnhardt,
et al.
HiBRID-SoC: A Multi-Core SoC Architecture for Multimedia Signal Processing
Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology, 41, 2,005
DOI, RIS, BibTex
HiBRID-SoC: A Multi-Core SoC Architecture for Multimedia Signal Processing
Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology, 41, 2,005
DOI, RIS, BibTex
M. Berekovic,
S. Moch, and
P. Pirsch
A scalable, clustered SMT processor for digital signal processing
ACM Sigarch Computer Architecture News, 32, 2,004
DOI, RIS, BibTex
A scalable, clustered SMT processor for digital signal processing
ACM Sigarch Computer Architecture News, 32, 2,004
DOI, RIS, BibTex
S. Moch,
M. Bereković,
H.-J. Stolberg,
L. Friebe,
M. B. Kulaczewski,
A. Dehnhardt, and
P. Pirsch
HIBRID-SOC: a multi-core architecture for image and video applications
ACM Sigarch Computer Architecture News, 32, 2,004
DOI, RIS, BibTex
HIBRID-SOC: a multi-core architecture for image and video applications
ACM Sigarch Computer Architecture News, 32, 2,004
DOI, RIS, BibTex
M. Berekovic,
P. Pirsch,
T. Selinger,
K.-i. Wels,
C. Miro,
A. Lafage,
C. Heer, and
G. Ghigo
Architecture of an Image Rendering CoProcessor for MPEG4 Visual Compositing
Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology, 31, 2,002
DOI, RIS, BibTex
Architecture of an Image Rendering CoProcessor for MPEG4 Visual Compositing
Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology, 31, 2,002
DOI, RIS, BibTex
M. Berekovic,
H.-J. Stolberg, and
P. Pirsch
Multicore system-on-chip architecture for MPEG4 streaming video
IEEE Transactions on Circuits and Systems for Video Technology, 12, 2,002
DOI, RIS, BibTex
Multicore system-on-chip architecture for MPEG4 streaming video
IEEE Transactions on Circuits and Systems for Video Technology, 12, 2,002
DOI, RIS, BibTex
H. J. Stolberg,
M. Berekovic,
P. Pirsch, and
H. Runge
The MPEG4 ad-vanced simple profile-a complexity study
2,001
RIS, BibTex
The MPEG4 ad-vanced simple profile-a complexity study
2,001
RIS, BibTex
M. Berekovic,
H. Kloos, and
P. Pirsch
Hardware Realization of a Java Virtual Machine for High Performance Multimedia Applications
Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology, 22, 1,999
DOI, RIS, BibTex
Hardware Realization of a Java Virtual Machine for High Performance Multimedia Applications
Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology, 22, 1,999
DOI, RIS, BibTex
M. Berekovic,
H.-j. Stolberg,
M. B. Kulaczewski,
P. Pirsch,
H. Möller,
H. Runge,
J. Kneip, and
B. Stabernack
Instruction Set Extensions for MPEG4 Video
Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology, 23, 1,999
DOI, RIS, BibTex
Instruction Set Extensions for MPEG4 Video
Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology, 23, 1,999
DOI, RIS, BibTex
M. Berekovic,
G. Meyer,
Y. Guo, and
P. Pirsch
Multimedia RISC core for efficient bitstream parsing and VLD
1,998
RIS, BibTex
Multimedia RISC core for efficient bitstream parsing and VLD
1,998
RIS, BibTex
M. Berekovic and
P. Pirsch
Architecture of a coprocessor module for image compositing
Physica Medica, 1,998
DOI, RIS, BibTex
Architecture of a coprocessor module for image compositing
Physica Medica, 1,998
DOI, RIS, BibTex
M. Berekovic,
P. Pirsch, and
J. Kneip
An Algorithm-Hardware-System Approach to VLIW Multimedia Processors
Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology, 20, 1,998
DOI, RIS, BibTex
An Algorithm-Hardware-System Approach to VLIW Multimedia Processors
Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology, 20, 1,998
DOI, RIS, BibTex
P. Pirsch,
A. Freimann, and
M. Berekovic
Architectural approaches for multimedia processors
1,997
RIS, BibTex
Architectural approaches for multimedia processors
1,997
RIS, BibTex
J. Kneip,
M. Berekovic,
J. P. Wittenburg,
W. Hinrichs, and
P. Pirsch
An Algorithm Adapted Autonomous Controlling Concept for a Parallel Single-Chip Digital Signal Processor
Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology, 16, 1,997
DOI, RIS, BibTex
An Algorithm Adapted Autonomous Controlling Concept for a Parallel Single-Chip Digital Signal Processor
Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology, 16, 1,997
DOI, RIS, BibTex
Conference Papers
H.-J. Stolberg,
S. Moch,
L. Friebe,
A. Dehnhardt,
M. B. Kulaczewski,
M. Berekovic, and
P. Pirsch
An SoC with two multimedia DSPs and a RISC core for video compression applications
Solid-State Circuits IEEE International Conference, 2,004
DOI, RIS, BibTex
An SoC with two multimedia DSPs and a RISC core for video compression applications
Solid-State Circuits IEEE International Conference, 2,004
DOI, RIS, BibTex
H.-J. Stolberg,
M. Berekovic,
L. Friebe,
S. Moch,
S. Flugel,
X. Mao,
M. B. Kulaczewski,
H. Klusmann,
et al.
HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing Applications
DATE '03: Proceedings of the conference on Design, Automation and Test in Europe, IEEE Computer Society, 2,003, ISBN 0-7695-1870-2
ISBN, RIS, BibTex
HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing Applications
DATE '03: Proceedings of the conference on Design, Automation and Test in Europe, IEEE Computer Society, 2,003, ISBN 0-7695-1870-2
ISBN, RIS, BibTex
M. Berekovic,
S. Moch, and
P. Pirsch
A scalable, clustered SMT processor for digital signal processing
MEDEA '03: Proceedings of the 2003 workshop on MEmory performance, ACM, 2,003
DOI, RIS, BibTex
A scalable, clustered SMT processor for digital signal processing
MEDEA '03: Proceedings of the 2003 workshop on MEmory performance, ACM, 2,003
DOI, RIS, BibTex
S. Moch,
M. Bereković,
H. J. Stolberg,
L. Friebe,
M. B. Kulaczewski,
A. Dehnhardt, and
P. Pirsch
HIBRID-SOC: a multi-core architecture for image and video applications
MEDEA '03: Proceedings of the 2003 workshop on MEmory performance, ACM, 2,003
DOI, RIS, BibTex
HIBRID-SOC: a multi-core architecture for image and video applications
MEDEA '03: Proceedings of the 2003 workshop on MEmory performance, ACM, 2,003
DOI, RIS, BibTex
H.-J. Stolberg,
M. Berekovic,
L. Friebe,
S. Moch,
M. B. Kulaczewski,
A. Dehnhardt, and
P. Pirsch
HiBRID-SoC: a multi-core SoC architecture for multimedia signal processing
IEEE Workshop on Signal Processing Systems, 2,003
DOI, RIS, BibTex
HiBRID-SoC: a multi-core SoC architecture for multimedia signal processing
IEEE Workshop on Signal Processing Systems, 2,003
DOI, RIS, BibTex
P. Pirsch,
M. Berekovic,
H.-J. Stolberg, and
J. Jachalsky
VLSI architectures for MPEG
International Symposium on VLSI Technology, Systems and Applications, 2,003
DOI, RIS, BibTex
VLSI architectures for MPEG
International Symposium on VLSI Technology, Systems and Applications, 2,003
DOI, RIS, BibTex
H.-J. Stolberg,
M. Berekovic,
L. Friebe,
S. Moch,
M. B. Kulaczewski, and
P. Pirsch
HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing
Very Large Scale Integration, 2,003
RIS, BibTex
HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing
Very Large Scale Integration, 2,003
RIS, BibTex
H.-J. Stolberg,
M. Berekovic,
L. Friebe,
S. Moch,
S. Flügel,
M. B. Kulaczewski, and
P. Pirsch
HiBRID-SoC: a multi-core architecture for image and video applications
International Conference on Image Processing, 2,003
DOI, RIS, BibTex
HiBRID-SoC: a multi-core architecture for image and video applications
International Conference on Image Processing, 2,003
DOI, RIS, BibTex
H.-J. Stolberg,
M. Berekovic, and
P. Pirsch
A platform-independent methodology for performance estimation of streaming media applications
International Conference on Multimedia Computing and Systems/International Conference on Multimedia and Expo, 2,002
DOI, RIS, BibTex
A platform-independent methodology for performance estimation of streaming media applications
International Conference on Multimedia Computing and Systems/International Conference on Multimedia and Expo, 2,002
DOI, RIS, BibTex
M. Berekovic,
H.-J. Stolberg,
P. Pirsch, and
H. Runge
A programmable co-porcessor for MPEG-4 video
ICASSP '01: Proceedings of the Acoustics, Speech, and Signal Processing, 200. on IEEE International Conference, IEEE Computer Society, 2,001, ISBN 0-7803-7041-4
DOI, ISBN, RIS, BibTex
A programmable co-porcessor for MPEG-4 video
ICASSP '01: Proceedings of the Acoustics, Speech, and Signal Processing, 200. on IEEE International Conference, IEEE Computer Society, 2,001, ISBN 0-7803-7041-4
DOI, ISBN, RIS, BibTex
H.-J. Stolberg,
M. Berekovic,
P. Pirsch, and
H. Runge
The MPEG4 Advanced Simple profile - a complexity study
Workshop and Exhibition on Moving Picture Experts Group, 2,001
DOI, RIS, BibTex
The MPEG4 Advanced Simple profile - a complexity study
Workshop and Exhibition on Moving Picture Experts Group, 2,001
DOI, RIS, BibTex
H.-J. Stolberg,
M. Berekovic,
P. Pirsch, and
H. Runge
Implementing The MPEG4 Advanced Simple Profile For Streaming Video Applications
International Conference on Multimedia Computing and Systems/International Conference on Multimedia and Expo, 2,001
DOI, RIS, BibTex
Implementing The MPEG4 Advanced Simple Profile For Streaming Video Applications
International Conference on Multimedia Computing and Systems/International Conference on Multimedia and Expo, 2,001
DOI, RIS, BibTex
M. Berekovic,
P. Pirsch,
T. Selinger,
K. -.-.. Wels,
C. Miro,
A. Lafage,
C. Heer, and
G. Ghigo
Architecture of an Image Rendering Co-Processor for MPEG-4 Systems
ASAP '00: Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors, IEEE Computer Society, 2,000, ISBN 0-7695-0716-6
ISBN, RIS, BibTex
Architecture of an Image Rendering Co-Processor for MPEG-4 Systems
ASAP '00: Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures, and Processors, IEEE Computer Society, 2,000, ISBN 0-7695-0716-6
ISBN, RIS, BibTex
M. Berekovic,
P. Pirsch,
T. Selinger,
K.-I. Wels,
C. Miro,
A. Lafage,
C. Heer, and
G. Ghigo
Coprocessor architecture for MPEG4 main profile visual compositing
IEEE International Symposium on Circuits and Systems, 2,000
DOI, RIS, BibTex
Coprocessor architecture for MPEG4 main profile visual compositing
IEEE International Symposium on Circuits and Systems, 2,000
DOI, RIS, BibTex
H.-J. Stolberg,
M. Berekovic,
P. Pirsch,
H. Runge,
H. Moller, and
J. Kneip
The M-PIRE MPEG4 codec DSP and its macroblock engine
IEEE International Symposium on Circuits and Systems, 2,000
DOI, RIS, BibTex
The M-PIRE MPEG4 codec DSP and its macroblock engine
IEEE International Symposium on Circuits and Systems, 2,000
DOI, RIS, BibTex
H. Kloos,
M. Berekovic, and
P. Pirsch
Hardware Realisierung einer JAVA Virtual Machine für High Performance Multimedia-Anwendungen
Architektur von Rechensystemen, Systemarchitektur auf dem Weg ins 3. Jahrtausend: Neue Strukturen, Konzepte, Verfahren und Bewertungsmethoden - Vorträge der 15. GI/ITG-Fachtagung ARCS '99 und der APS'99 (Arbeitsplatzrechensysteme), VDE-Verlag GmbH, 1,999, ISBN 3-8007-2482-0
ISBN, RIS, BibTex
Hardware Realisierung einer JAVA Virtual Machine für High Performance Multimedia-Anwendungen
Architektur von Rechensystemen, Systemarchitektur auf dem Weg ins 3. Jahrtausend: Neue Strukturen, Konzepte, Verfahren und Bewertungsmethoden - Vorträge der 15. GI/ITG-Fachtagung ARCS '99 und der APS'99 (Arbeitsplatzrechensysteme), VDE-Verlag GmbH, 1,999, ISBN 3-8007-2482-0
ISBN, RIS, BibTex
M. Berekovic,
T. Selinger,
C. Miro,
G. Ghigo,
C. Heer,
P. Pirsch,
K.-I. Wels, and
A. Lafage
The TANGRAM co-processor for MPEG4 visual compositing
IEEE Workshop on Signal Processing Systems, 1,999
DOI, RIS, BibTex
The TANGRAM co-processor for MPEG4 visual compositing
IEEE Workshop on Signal Processing Systems, 1,999
DOI, RIS, BibTex
M. Berekovic,
K. Jacob, and
P. Pirsch
Architecture of a hardware module for MPEG4 shape decoding
IEEE International Symposium on Circuits and Systems, 1,999
DOI, RIS, BibTex
Architecture of a hardware module for MPEG4 shape decoding
IEEE International Symposium on Circuits and Systems, 1,999
DOI, RIS, BibTex
M. Berekovic and
P. Pirsch
An Array Processor Architecture with Parallel Data Cache for Image Rendering and Compositing
CGI '98: Proceedings of the Computer Graphics International 1998, IEEE Computer Society, 1,998, ISBN 0-8186-8445-3
ISBN, RIS, BibTex
An Array Processor Architecture with Parallel Data Cache for Image Rendering and Compositing
CGI '98: Proceedings of the Computer Graphics International 1998, IEEE Computer Society, 1,998, ISBN 0-8186-8445-3
ISBN, RIS, BibTex
M. Berekovic,
R. Frase, and
P. Pirsch
A flexible processor architecture for MPEG4 image compositing
International Conference on Acoustics, Speech, and Signal Processing, 1,998
DOI, RIS, BibTex
A flexible processor architecture for MPEG4 image compositing
International Conference on Acoustics, Speech, and Signal Processing, 1,998
DOI, RIS, BibTex
M. Berekovic,
D. Heistermann, and
P. Pirsch
A core generator for fully synthesizable and highly parameterizable RISC-cores for system-on-chip designs
IEEE Workshop on Signal Processing Systems, 1,998
DOI, RIS, BibTex
A core generator for fully synthesizable and highly parameterizable RISC-cores for system-on-chip designs
IEEE Workshop on Signal Processing Systems, 1,998
DOI, RIS, BibTex
J. P. Wittenburg,
W. Hinrichs,
J. Kneip,
M. Ohmacht,
M. Berekovic,
H. Lieske,
H. Kloos, and
P. Pirsch
Realization of a programmable parallel DSP for high performance image processing applications
DAC '98: Proceedings of the 35th annual Design Automation Conference, ACM, 1,998, ISBN 0-89791-964-5
DOI, ISBN, RIS, BibTex
Realization of a programmable parallel DSP for high performance image processing applications
DAC '98: Proceedings of the 35th annual Design Automation Conference, ACM, 1,998, ISBN 0-89791-964-5
DOI, ISBN, RIS, BibTex
M. Berekovic,
H. Kloos, and
P. Pirsch
Hardware realization of a Java virtual machine for high performance multimedia applications
IEEE Workshop on Signal Processing Systems, 1,997
DOI, RIS, BibTex
Hardware realization of a Java virtual machine for high performance multimedia applications
IEEE Workshop on Signal Processing Systems, 1,997
DOI, RIS, BibTex
J. Kneip,
M. Berekovic, and
P. Pirsch
An algorithm-hardware-system approach to VLIW multimedia processors
Multimedia Signal Processing, 1,997
DOI, RIS, BibTex
An algorithm-hardware-system approach to VLIW multimedia processors
Multimedia Signal Processing, 1,997
DOI, RIS, BibTex
J. Kneip,
J. P. Wittenburg,
M. Berekovic,
K. Ronner, and
P. Pirsch
An algorithm adapted autonomous controlling concept for a parallel single-chip digital signal processor
Workshop on VLSI Signal Processing, 1,995
DOI, RIS, BibTex
An algorithm adapted autonomous controlling concept for a parallel single-chip digital signal processor
Workshop on VLSI Signal Processing, 1,995
DOI, RIS, BibTex