H.-J. Stolberg, M. Berekovic, S. Moch, L. Friebe, M. B. Kulaczewski, S. Flügel, H. Klußmann, A. Dehnhardt, et al.
HiBRID-SoC: A Multi-Core SoC Architecture for Multimedia Signal Processing
Journal of Vlsi Signal Processing Systems for Signal Image and Video Technology, 41, 2,005
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S. Moch, M. Bereković, H.-J. Stolberg, L. Friebe, M. B. Kulaczewski, A. Dehnhardt, and P. Pirsch
HIBRID-SOC: a multi-core architecture for image and video applications
ACM Sigarch Computer Architecture News, 32, 2,004
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H.-J. Stolberg, S. Moch, L. Friebe, A. Dehnhardt, M. B. Kulaczewski, M. Berekovic, and P. Pirsch
An SoC with two multimedia DSPs and a RISC core for video compression applications
Solid-State Circuits IEEE International Conference, 2,004
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S. Moch, M. Bereković, H. J. Stolberg, L. Friebe, M. B. Kulaczewski, A. Dehnhardt, and P. Pirsch
HIBRID-SOC: a multi-core architecture for image and video applications
MEDEA '03: Proceedings of the 2003 workshop on MEmory performance, ACM, 2,003
DOI, RIS, BibTex

H.-J. Stolberg, M. Berekovic, L. Friebe, S. Moch, M. B. Kulaczewski, A. Dehnhardt, and P. Pirsch
HiBRID-SoC: a multi-core SoC architecture for multimedia signal processing
IEEE Workshop on Signal Processing Systems, 2,003
DOI, RIS, BibTex

L. Friebe, H.-J. Stolberg, M. Berekovic, S. Moch, M. B. Kulaczewski, A. Dehnhardt, and R. Pirsch
HiBRID-SoC: a system-on-chip architecture with two multimedia DSPs and a RISC core
IEEE International System-on-Chip (SoC) Conference, 2,003
DOI, RIS, BibTex