M. Hartmann, T. V. Aa, M. Berekovic, and C. Hochberger
Still Image Processing on Coarse-Grained Reconfigurable Array Architectures
Journal of Signal Processing Systems, 60, 2.010
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A. Garcia, M. Berekovic, and T. V. Aa
Mapping of the AES cryptographic algorithm on a Coarse-Grain reconfigurable array processor
ASAP '08: Proceedings of the 2008 International Conference on Application-Specific Systems, Architectures and Processors, IEEE Computer Society, 2.008, ISBN 978-1-4244-1897-8
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M. Hartmann, T. V. Aa, M. Berekovic, C. Hochberger, and B. D. Sutter
Still Image Processing on Coarse-Grained Reconfigurable Array Architectures
Embedded Systems for Real-Time Multimedia, 2.007
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M. Berekovic, F. Bouwens, T. V. Aa, and D. Verkest
Interconnect Power Analysis for a Coarse-Grained Reconfigurable Array Processor
Workshop on Power and Timing Modeling, Optimization and Simulation, 2.008
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B. D. Sutter, B. Mei, A. Bartic, T. V. Aa, M. Berekovic, J.-y. Mignolet, K. Croes, P. Coene, et al.
Hardware and a Tool Chain for ADRES
Applied Reconfigurable Computing, 2.006
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