Publication
M. Berekovic,
F. Bouwens,
T. V. Aa, and
D. Verkest
Interconnect Power Analysis for a Coarse-Grained Reconfigurable Array Processor
Workshop on Power and Timing Modeling, Optimization and Simulation, 2,008
DOI, RIS, BibTex
Interconnect Power Analysis for a Coarse-Grained Reconfigurable Array Processor
Workshop on Power and Timing Modeling, Optimization and Simulation, 2,008
DOI, RIS, BibTex
Reference
@book{4728057,
author = "M. Berekovic and F. Bouwens and T. V. Aa and D. Verkest",
title = "Interconnect Power Analysis for a Coarse-Grained Reconfigurable Array Processor",
year = 2,008,
booktitle = "Workshop on Power and Timing Modeling, Optimization and Simulation",
doi = "10.1007/978-3-540-95948-9_45"
}