Conference Papers
R. Koch,
C. Albrecht, and
T. Pionteck
Adaptive Health Monitoring in a Reconfigurable Network-on-Chip
Workshop on Diagnostic Services in Network-on-Chips (DSNOC), Nice 2009, 2.009
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Adaptive Health Monitoring in a Reconfigurable Network-on-Chip
Workshop on Diagnostic Services in Network-on-Chips (DSNOC), Nice 2009, 2.009
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C. Albrecht,
R. Koch, and
T. Pionteck
On the Impact of Buffer Size on Packet Loss in Adaptable Network-on-Chips for Runtime Reconfigurable System-on-Chips
NORCHIP, 1-4, Trondheim 2009, 2.009
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On the Impact of Buffer Size on Packet Loss in Adaptable Network-on-Chips for Runtime Reconfigurable System-on-Chips
NORCHIP, 1-4, Trondheim 2009, 2.009
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C. Albrecht,
R. Koch,
T. Pionteck, and
P. Glösekötter
Towards a Flexible Fault-Tolerant System-on-Chip
22th International Conference on Architecture of Computing Systems - Workshop Proceedings, 83-90, VDE Verlag GmbH, Berlin 2009, 2.009
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Towards a Flexible Fault-Tolerant System-on-Chip
22th International Conference on Architecture of Computing Systems - Workshop Proceedings, 83-90, VDE Verlag GmbH, Berlin 2009, 2.009
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C. Albrecht,
J. Foag,
R. Koch,
E. Maehle, and
T. Pionteck
DynaCORE – Dynamically Reconfigurable Coprocessor for Network Processors
Dynamically Reconfigurable Systems Architectures: Design Methods and Applications, Springer, 2009, 2.009
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DynaCORE – Dynamically Reconfigurable Coprocessor for Network Processors
Dynamically Reconfigurable Systems Architectures: Design Methods and Applications, Springer, 2009, 2.009
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T. Pionteck,
R. Koch,
C. Albrecht,
E. Maehle,
M. Meitinger,
R. Ohlendorf,
T. Wild, and
A. Herkersdorf
SPP1148 booth: Network processors
International Conference on Field Programmable Logic and Applications, 352, IEEE, Heidelberg 2008, 2.008
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SPP1148 booth: Network processors
International Conference on Field Programmable Logic and Applications, 352, IEEE, Heidelberg 2008, 2.008
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T. Pionteck,
C. Albrecht,
R. Koch, and
E. Maehle
ON THE DESIGN PARAMETERS OF RUNTIME RECONFIGURABLE SYSTEMS
International Conference on Field Programmable Logic and Applications, 683-686, IEEE, Heidelberg 2008, 2.008
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ON THE DESIGN PARAMETERS OF RUNTIME RECONFIGURABLE SYSTEMS
International Conference on Field Programmable Logic and Applications, 683-686, IEEE, Heidelberg 2008, 2.008
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T. Pionteck,
C. Albrecht,
R. Koch, and
E. Maehle
Performance and Reliability Monitoring in Network-on-Chips
Workshop on Diagnostic Services in Network-on-Chips (DSNOC), 2008, 2.008
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Performance and Reliability Monitoring in Network-on-Chips
Workshop on Diagnostic Services in Network-on-Chips (DSNOC), 2008, 2.008
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T. Pionteck,
C. Albrecht,
R. Koch,
T. Brix, and
E. Maehle
Design and Simulation of Runtime Reconfigurable Systems
IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2008 ), 154-157, IEEE, 2008, 2.008
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Design and Simulation of Runtime Reconfigurable Systems
IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2008 ), 154-157, IEEE, 2008, 2.008
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C. Albrecht,
M. Werner,
T. Pionteck,
R. Fuchsen,
R. Koch, and
E. Maehle
WCET Determination Tool for Embedded Systems Software
SIMUTools08 Proceedings, 1, ICST, Marseille, France 2008, 2.008
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WCET Determination Tool for Embedded Systems Software
SIMUTools08 Proceedings, 1, ICST, Marseille, France 2008, 2.008
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C. Albrecht,
P. Roß,
R. Koch,
T. Pionteck, and
E. Maehle
Performance Analysis of Bus-Based Interconnects for a Run-Time Reconfigurable Co-Processor Platform
PDP 08, 200-205, IEEE Computer Society, Toulouse, France 2008, 2.008
URL, DOI, RIS, BibTex
Performance Analysis of Bus-Based Interconnects for a Run-Time Reconfigurable Co-Processor Platform
PDP 08, 200-205, IEEE Computer Society, Toulouse, France 2008, 2.008
URL, DOI, RIS, BibTex
C. Albrecht,
C. Osterloh,
T. Pionteck,
R. Koch, and
E. Maehle
An Application-Oriented Synthetic Network Traffic Generator
European Conference on Modelling and Simulation 2008, 299-305, ECMS, Nicosia, Cyprus 2008, 2.008
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An Application-Oriented Synthetic Network Traffic Generator
European Conference on Modelling and Simulation 2008, 299-305, ECMS, Nicosia, Cyprus 2008, 2.008
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T. Pionteck,
C. Albrecht,
R. Koch,
E. Maehle,
M. Hübner, and
J. Becker
Communication Architectures for Dynamically Reconfigurable FPGA Designs
14th Reconfigurable Architectures Workshop, 162, IEEE Computer Society, Long Beach, USA 2007, 2.007
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Communication Architectures for Dynamically Reconfigurable FPGA Designs
14th Reconfigurable Architectures Workshop, 162, IEEE Computer Society, Long Beach, USA 2007, 2.007
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R. Koch,
T. Pionteck,
C. Albrecht, and
E. Maehle
A Lightweight Framework for Runtime Reconfigurable System Prototyping
18th IEEE/IFIP International Workshop on Rapid System Prototyping (RSP 2007), 61-64, IEEE Computer Society, Porto Alegre, Brazil 2007, 2.007
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A Lightweight Framework for Runtime Reconfigurable System Prototyping
18th IEEE/IFIP International Workshop on Rapid System Prototyping (RSP 2007), 61-64, IEEE Computer Society, Porto Alegre, Brazil 2007, 2.007
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C. Albrecht,
T. Pionteck,
R. Koch, and
E. Maehle
Modelling Tile-Based Run-Time Reconfigurable Systems Using SystemC
European Conference on Modelling and Simulation 2007, 509-514, ISBN 978-0-9553018-2-7, Prague, Czech Republic 2007, 2.007
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Modelling Tile-Based Run-Time Reconfigurable Systems Using SystemC
European Conference on Modelling and Simulation 2007, 509-514, ISBN 978-0-9553018-2-7, Prague, Czech Republic 2007, 2.007
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C. Albrecht,
R. Koch,
T. Pionteck, and
E. Maehle
Simulation System for Run-Time Reconfigurable Networks-on-Chip
Proceedings of the 6th EUROSIM Congress on Modelling and Simulation, ARGESIM - ARGE Simulation News, Wiedner Hauptstrasse 8-10, 1040 Vienna 2007, 2.007
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Simulation System for Run-Time Reconfigurable Networks-on-Chip
Proceedings of the 6th EUROSIM Congress on Modelling and Simulation, ARGESIM - ARGE Simulation News, Wiedner Hauptstrasse 8-10, 1040 Vienna 2007, 2.007
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T. Pionteck,
R. Koch, and
C. Albrecht
Applying Partial Reconfiguration to Networks-on-Chips
16th International Conference on Field Programmable Logic and Applications (FPL), 155-160, IEEE, Madrid, Spain 2006, 2.006
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Applying Partial Reconfiguration to Networks-on-Chips
16th International Conference on Field Programmable Logic and Applications (FPL), 155-160, IEEE, Madrid, Spain 2006, 2.006
RIS, BibTex
T. Pionteck,
C. Albrecht, and
R. Koch
A Dynamically Reconfigurable Packet-Switched Network-on-Chip
Design Automation and Test in Europe, Date 2006, 136-137, ACM SIGDA, München 2006, 2.006
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A Dynamically Reconfigurable Packet-Switched Network-on-Chip
Design Automation and Test in Europe, Date 2006, 136-137, ACM SIGDA, München 2006, 2.006
RIS, BibTex
R. Koch,
T. Pionteck,
C. Albrecht, and
E. Maehle
An Adaptive System-on-Chip for Network Applications
13th Reconfigurable Architectures Workshop (RAW 2006 ) associated with the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), IEEE, Rhodes Island, Greece 2006, 2.006
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An Adaptive System-on-Chip for Network Applications
13th Reconfigurable Architectures Workshop (RAW 2006 ) associated with the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), IEEE, Rhodes Island, Greece 2006, 2.006
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C. Albrecht,
J. Foag,
R. Koch, and
E. Maehle
DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors
Proc. of the 14th Euromicro Conference on Parallel, Distributed and Network-based Processing (PDP 2006), 101-108, IEEE Computer Society, Montbeliard-Sochaux, France 2006, 2.006
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DynaCORE - A Dynamically Reconfigurable Coprocessor Architecture for Network Processors
Proc. of the 14th Euromicro Conference on Parallel, Distributed and Network-based Processing (PDP 2006), 101-108, IEEE Computer Society, Montbeliard-Sochaux, France 2006, 2.006
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J. Foag and
R. Koch
Towards a Runtime Reconfigurable Network-on-Chip-Based Network Processor
Proceedings of the International Workshop on Appplied Reconfigurable Computing 2005 (ARC 2005), 84-91, Algarve, Portugal 2005, 2.005
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Towards a Runtime Reconfigurable Network-on-Chip-Based Network Processor
Proceedings of the International Workshop on Appplied Reconfigurable Computing 2005 (ARC 2005), 84-91, Algarve, Portugal 2005, 2.005
RIS, BibTex
C. Albrecht,
R. Koch, and
T. Pionteck
On the Design of a Loosely-Coupled Run-Time Reconfigurable Network Coprocessor
Workshop on Media and Streaming Processors, 43-49, Barcelona, Spain 2005, 2.005
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On the Design of a Loosely-Coupled Run-Time Reconfigurable Network Coprocessor
Workshop on Media and Streaming Processors, 43-49, Barcelona, Spain 2005, 2.005
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J. Foag and
R. Koch
Architecture Conception of a Reconfigurable Network Coprocessor Platform (DynaCore) for Flexible Task Offloading
ANCHOR 2004, 32-38, München 2004, 2.004
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Architecture Conception of a Reconfigurable Network Coprocessor Platform (DynaCore) for Flexible Task Offloading
ANCHOR 2004, 32-38, München 2004, 2.004
RIS, BibTex