R. Backasch, G. Hempel, T. Pionteck, S. Groppe, and S. Werner
An Architectural Template for Composing Application Specific Datapaths at Runtime
To Appear: International Conference on Reconfigurable Computing and FPGAs (ReConFig), IEEE, Cancun, Mexiko 2015, 2.015
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R. Backasch, G. Hempel, S. Groppe, S. Werner, and T. Pionteck
Identifying Homogenous Reconfigurable Regions in Heterogeneous FPGAs for Module Relocation
International Conference on Reconfigurable Computing and FPGAs (ReConFig), 1-6, IEEE, Cancun, Mexiko 2014, 2.014
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G. Hempel, J. Hoyer, T. Pionteck, and C. Hochberger
Register Allocation for High-Level Synthesis of Hardware Accelerators Targeting FPGAs
8th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 1 - 6, IEEE, Darmstadt, Germany 2013, 2.013
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