Trustworthiness Research Group


An accurate prediction of computing system behavior ensures its trustworthiness. The term "System behavior prediction" indicates the minimization of the risks, hazards, and threats that could lead to undesirable system behavior. Therefore, high level of security, reliability, and safety are required. The "trustworthiness Research Group" works on devising and developing hardware-based solutions to the current problems in the domain of trusted and trustworthy (dependable) computing.

Our research interests are in the area of designing dependable computing platforms,  security by design, reliability in Electronics. In particular, we are working on developing a new secure and safe processor design, designing an efficient hardware cryptographic accelerator,  devising a new hardware device identity, and verifying the functionality and security of computing platforms.  

Lab Activities:

1. Trustworthy (dependable) Computing System

We focus on the following advance and hot topics in the field of  hardware security and hardware-based security solutions :  

  • Designing and Developing a secure Processor architecture ( Open-Source RISC-V-based).
  • Designing trustwsorthy AI- Accelerator.
  • Designing Secure Cryptographic Accelerator.
  • Designing new Accelerators for Homomorphic Encryption.
  • Developing Hardware Root of Trust: OpenTitan-based.
  • Implementing and evaluating the trustworthniss of SoCs.
  • Designing Cryptographic Engine.
  • Investigating the threat Model for Embedded System Devices.

2. Design for Hardware Trust

Modern IC-production line includes several vendors and suppliers. Part of them is considered as untrusted parties. This production model can be threatened by any parties in every phase of IC-production line. This leads to affecting the reliability and security of the ICs. We focus on the following advance topics in Trustworthy Electronics:

  • Developing a new hardware Trojan detection method based on Machine learning algorithms.
  • Developing Process Specific Functions for detecting hardware Trojans. 
  • Developing a new formal verification technique for Trojan-free trusted ICs.
  • Designing and developing a new anti-Reverse Engineering technique.
  • Designing and developing a new hardware root of trust to be deployed in the rusted computing for embedded systems.  
  • Designing and developing a new approach based on Physical Unclonable functions (PUFs) for anti-Counterfeiting and ant-cloning ICs.  
  • Designing and implementing a new approach for Hardware IP Watermarking as a watermarking in Physical Level Design.
  • Designing a new method for constructing and building Hardware Trojans.
Modern Supply Chain: IC development steps and their vulnerabilities

3. System Model for Trustworthiness Analysis

we focus on designing and developing System Models of processors and accelerators by using SystemC. Then we use these models to analyze the trustworthiness in the early design stage as follows:

  • Analyzing the fault behavior and propagation.
  • Analyzing the security level.
  • Verifying the safety of the design .

4. Reliability in Electronics

We focus on the following advance and hot topics in the field of reliability in electronics and reliability engineering:

  • Designing and developing reliable RRAM-based Accelerators.
  • Designing a reliable cryptographic Accelerator..
  • Analysing and evaluating SoC Reliability.
  • Developing HW-SW co-verification technique for reliable IPs and ICs.

Trustworthiness Group Publications


  • J. Bouhlila, F. Last, R. Buchty, M. Berekovic and S. Mulhem, "Machine Learning for SRAM Stability Analysis," 2024 IEEE International Symposium on Circuits and Systems (ISCAS), Singapore, Singapore, 2024, pp. 1-5, doi: 10.1109/ISCAS58744.2024.10558564.
  • Rama, E.; Ayache, M.; Buchty, R.; Bauer, B.; Korb, M.; Berekovic, M.; Mulhem, S.: Trustworthy Integrated Circuits: From Safety to Security and Beyond. IEEE Access, IEEE, 2024. [Paper]
  • P. Schmidt et al., "EMDRIVE Architecture: Embedded Distributed Computing and Diagnostics from Sensor to Edge," 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), Valencia, Spain, 2024, pp. 1-6.
  • Foudhaili, W., Nechi, A., Thermann, C., Al Johmani, M., Buchty, R., Berekovic, M., & Mulhem, S. (2024, March). Reconfigurable Edge Hardware for Intelligent IDS: Systematic Approach. In International Symposium on Applied Reconfigurable Computing (pp. 48-62). Cham: Springer Nature Switzerland.
  • Mulhem, S., Muuss, F., Ewert, C., Buchty, R., and Berekovic, M., ML-Based Trojan Classification: Repercussions of Toxic Boundary Nets, in IEEE Embedded Systems Letters, doi: 10.1109/LES.2023.3338543.[Paper]



  • Grothe, P., Mulhem, S., Berekovic, M. (2023). An Almost Fully RRAM-Based LUT Design for Reconfigurable Circuits. In: Palumbo, F., Keramidas, G., Voros, N., Diniz, P.C. (eds) Applied Reconfigurable Computing. Architectures, Tools, and Applications. ARC 2023. Lecture Notes in Computer Science, vol 14251. Springer, Cham.
  • Nechi,A., Groth, L., Mulhem, S., Merchant, F., Buchty, R.,  Berekovic, M.,: FPGA-based Deep Learning Inference Accelerators: Where Are We Standing?. ACM Transactions on Reconfigurable Technology and Systems, ACM, New York 2023. [Paper]
  • Nechi, A.; Mahmoudi, A.; Herold, C.; Widmer, D.; Kürner, T.; Berekovic, M.; Mulhem, S: Practical Trustworthiness Model for DNN in Dedicated 6G Application. 19th International Conference on Wireless and Mobile Computing, Networking and Communications (WiMob), IEEE, Montreal, QC, Canada 2023  [Paper]


  • Bernhard Bauer, Mouadh Ayache, Saleh Mulhem, Meirav Nitzan, Jyotika Athavale, Rainer Buchty, and Mladen Berekovic.On the Dependability Lifecycle of Electrical/Electronic Product Development: The Dual-Cone V-Model,in Computer, vol. 55, no. 9, pp. 99-106, Sept. 2022.DOI:10.1109/MC.2022.3187810  [Paper]