[PKG06]

Pionteck, T.; Kabulepa, L.D.; Glesner, M.: Exploring the Capabilities of Reconfigurable Hardware for OFDM-based WLANs. Invited chapter in VLSI-SOC: From Systems to Chips, Glesner, M.; Reis, R.; Indrusiak, L; Mooney, V.; Eveking, H. (Eds.), Kluwer-Springer, 2006, ISBN: 0-387-33402-5

[GHH05]

Glesner, M.; Hinkelmann, H.; Hollstein, T.; Indrusiak, L.; Murgan, T.; Obeid, A.; Petrov, M.; Pionteck, T.; Zipf, P.: Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques. Proceedings of the 5th International Workshop on Systems, Architectures, Modeling, and Simulation (SAMOS 2005), Samos, Greece, 2005

[HPO05]

Hinkelmann, H.;Pionteck, T.; Kleine, O.;Glesner, M.: Prozessorintegration und Speicheranbindung dynamisch rekonfigurierbarer Funktionseinheiten. 18th International Conference on Architecture of Computing Systems (ARCS'05), Workshop on Dynamically Reconfigurable Systems, Workshop Proceedings, Innsbruck, Austria 2005

[PSS04a]

Pionteck, T.; Stiefmeier, T; Staake, T,; Glesner, M.: A Dynamically Reconfigurable Function-Unit for Error Detection and Correction in Mobile Terminals. Proceedings of the 14th International Conference on Field-Programmable Logic (FPL 2004), 1090-1092, Antwerp, Belgium 2004

[PSS04b]

Pionteck, T.; Staake, T; Thomas, T,; Kabulepa, L.D.; Glesner, M.: esign of a Reconfigurable AES Encryption/Decryption Engine for Mobile Terminal. Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2004), 377-389, Vancouver, Canada 2004

[GHI04]

Glesner, T.; Hollstein, T; Indrusiak, l,; Zipf, P.; Pionteck, T.; Petrov, M.; Zimmer, H.; Murgan, T.: Reconfiguraböe Platforms for Ubiquitous Computing. Proceedings of the First Conference on Computing Frontiers, 377-389, Ischia, Italy 2004

[PSS04c]

Pionteck, T.; Stiefmeier, T; Staake, T.; Kabulepa, L.D.; Glesner, M.: Integration dynamisch rekonfigurierbarer Funktionseinheiten in Prozessoren. 17th International Conference on Architecture of Computing Systems (ARCS'05), Workshop on Dynamically Reconfigurable Systems, Workshop Proceedings, 155-165, Augsburg, Germany 2004

[PSS04d]

Pionteck, T.; Staake, T.; Stiefmeier, T; Kabulepa, L.D.; Glesner, M.: On the Design of a Function-Specific Reconfiguable Hardware Accelerator for the MAC-Layer in WLANs. 2004 ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, Poster Presentation, Monterey, California, USA 2004

[PKG03a]

Pionteck, T.; Kabulepa, L.D.; Glesner, M.: On the Rapid Prototyping of Equalizers for OFDM Systems. Design Automation for Embeded Systems, Volume 8, Issue 4, Dec 2003, 283 - 295

[PGK03]

Pionteck, T.; Garcia, A,; Kabulepa, L.D.; Glesner, M.: Hardware Evaluation of Low Power Communication Mechanisms for Transport-Triggered Architectures. Proceedings of the 14th IEEE International Workshop on Rapid Systems Prototyping, 141-147, San Diego, USA 2003

[PKK03]

Pionteck, T.; Kabulepa, L.D.; Koppel, S.; Garcia, A.; Glesner, M.: Hardware-Efficient Detection and Correction of Timing Offsets in OFDM-based WLANs. Proceedings of the 8th International OFDM Workshop, 137-140, Hamburg, Germany 2003

[PKS03]

Pionteck, T.; Kabulepa, L.D.; Schlachta, C.; Glesner, M.: Reconfiguration Requirements for High Speed Wireless Communication Systems. Proceedings of the IEEE International Conference on Field-Programmable Technology (FPT2003), 118-125, Tokyo, Japan 2003

[PKG03b]

Pionteck, T.; Kabulepa, L.D.; Glesner, M.: Exploring the Capabilities of Reconfigurable Hardware for OFDM-based WLANs. Proceedings of the IFIP International Conference on Very Large Scale Integration of System-onChip (IFIP VLSI-SoC2003), 161-166, Darmstadt, Germany 2003

[PKG03b]

Kabulepa, L.D.; Pionteck, T.; Garcia, A.; Glesner, M.: Design Space Exploration for Clipping and Filtering PARP Reduction Techniques in OFDM Systems. Proceedings of the 8th International OFDM Workshop, 108-112, Hamburg, Germany 2003

[PKO03]

Kabulepa, L.D.; Pionteck, T.; Ocampo, J.J.; Kögel, B.W.; Glesner, M.: On the Impact of MOS Parameter Variations on the AM-AM Characteristics of a 2.4 GHz CMOS Amplifier for OFDM. Proceedings of the 8th International OFDM Workshop, 284-288, Hamburg, Germany 2003

[PZK02]

Pionteck, T.; Zipf, P.; Kabulepa, L.D.; Glesner, M.: A Framework for Teaching (Re)Configurable Architectures in Student Projects. Proceedings of the 12th International Conference on Field-Programmable Logic (FPL 2002), 444-451, Montpellier, France, 2002

[PKG02]

Pionteck, T.; Kabulepa, L.D.; Glesner, M.: Considerations on the Hardware Design of Equalizers for OFDM Systems. Proceedings of the 14th International Conference on Wireless Communications (Wireless2002), 2:318-325, Calgary, Canada 2002

[PTK02]

Pionteck, T.; Toender, N.; Kabulepa, L.D.; Glesner, M.; Kella, T.: On the Rapid Prototyping of Equalizers for OFDM Systems. Proceedings of the 13th International Workshop on Rapid System Prototyping (RSP02), 48-52, Darmstadt, Germany 2002

[BPG01a]

Becker, J.; Pionteck, T.; Glesner, M.: Adaptive Systems-on-Chip: Architecture, Technologies and Applications. Proceedings of the 14th Symposium on Integrated Circuits and Systems Design (SBCCI 2001), 2-7, Pirenópolis, Brazil 2001

[KPL01]

Kabulepa, L.D.; Pionteck, T.; Ludewig, R.; Glesner, M.; Plechinger, J.: On the Numerical Accuracy of CORDIC-based Frequency Offset Compensation in Burst Oriented OFDM Systems. Proceedings of the 8th IEEE International Conference on Eletronics, Circuits and Systems, 1096-1072, Malta, Malta 2001

[BLP01]

Becker, J.; Liebau, N.; Pionteck, T.; Glesner, M.: Efficient Mapping of pre-synthesized IP-Cores onto Dynamically Reconfigurable Array Architectures. Proceedings of the 11th International Conference on Field-Programmable Logic (FPL 2001), 584-589, Belfast, UK 2001

[BPG01b]

Becker, J.; Pionteck, T.; Glesner, M.: Simualtion, Prototyping and Reconfigurable Hardware Realization of CDMA RAKE-Receiver Algrothms for Flexible Mobile Transceivers. International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA 2001), Las Vegas, USA 2001

[BPH01]

Becker, J.; Pionteck, T.; Habermann, G.; Glesner, M.: Design and Implementation of a Coarse-Grained Dynamically Reconfigurable Hardware Architecture. Proceedings of the IEEE Computer Society Workshop on VLSI, 41-46, Orlando, Florida, USA 2001

[BPG01c]

Becker, J.; Pionteck, T.; Glesner, M.: Effiziente IP-basierte Abbildungsverfahren für dynamisch rekonfigurierbare Array-Architekturen. 10. E.I.S.-Workshop, 315-320, Dresden, Germany 2001

[BPG00a]

Becker, J.; Pionteck, T.; Glesner, M.: An Application-tailored Dynamically Reconfigurable Hardware Architecture for Digital Baseband Processing. 10. Proceedings of the 13th Symposium on Integrated Circuits and Systems Design (SBCCI2000), 341-346, Manaus, Brazil 2000

[BPG00b]

Becker, J.; Pionteck, T.; Glesner, M.: Dynamisch rekonfigurierbare Hardwarearchitekturen für flexible System-on-Chip Lösungen in der Mobilkommunikation. 10. Dresdner Arbeitstagung Schaltungs- und Systementwurf (DASS 2000), 315-320, Dresden, Germany 2000

[GBP00]

Becker, J.; Pionteck, T.; Glesner, M.: Future Research, Application and Education Perspectives of Complex Systems-on-Chip (SoC). Invited Paper, Baltic Electronics Conference, 1-8, Tallinn, Estonia 2000

[BPG0c]

Becker, J.; Pionteck, T.; Glesner, M.: DReAM: A Dynamically Reconfigurable Architecture for Future Mobile Communciation Applications. Proceedings of the 10th International Conference on Field-Programmable Logic (FPL 2000), 321-330, Villach, Austria 2000