Mitarbeiter

Dr. rer. nat. Rainer Buchty

Wissenschaftlicher Mitarbeiter


Ratzeburger Allee 160
23562 Lübeck
Gebäude 64, Raum 113 (2.OG)

Email:buchty(at)iti.uni-luebeck.de
Telefon:+49 451 3101 6301
Fax:+49 451 3101 6304

Publikationen

[SBB17] P. Siegl, R. Buchty, and M. Berekovic: A Bandwidth Accurate, Flexible and Rapid Simulating Multi-HMC Modelling Tool. Proceedings of the Third International Symposium on Memory Systems, MEMSYS 2017, ACM, Washington, DC, USA 2017
[FSW16] B. Farkas, S. A. A. Shah, J. Wagner, R. Meyer, R. Buchty, and M. Berekovic: An Open and Flexible SystemC to VHDL Workflow for Rapid Prototyping. Design and Verification Conference (DVCon) Europe 2016, Munich, Germany, 2016
[MWF16] R. Meyer, J. Wagner, B. Farkas, S. Horsinka, P. Siegl, R. Buchty, and M. Berekovic: A Scriptable Standard-Compliant Reporting and Logging Framework for SystemC. ACM Trans. Embed. Comput. Syst., 16(1), ACM, 2016
[SBB16] P. Siegl, R. Buchty, and M. Berekovic: Data-Centric Computing Frontiers: A Survey On Processing-In-Memory. Proceedings of the Second International Symposium on Memory Systems, MEMSYS 2016, ACM, Washington, DC, USA 2016
[SBB16a] P. Siegl, R. Buchty, and M. Berekovic: Towards Bridging the Gap Between Academic and Industrial Heterogeneous System Architecture Design Space Exploration. Proceedings of the 2016 Workshop on Rapid Simulation and Performance Evaluation - Methods and Tools, RAPIDO@HiPEAC 2016, ACM, Prague, Czech Republic 2016
[SBF16] P. Siegl, R. Buchty, B. Farkas, S. A. Horsinka, R. Meyer, J. Wagner, and M. Berekovic: The Past, Present and Future of the Open-Source Virtual Platform SoCRocket. Proceedings of the 2016 Workshop on Mixed Criticality Applications and Implementation Approaches, EMC^2@HiPEAC 2016, Prague, Czech Republic 2016
[Buc15] R. Buchty: Reconfigurable ROS-based Resilient Reasoning Robotic Cooperating Platforms -- R5-COP. The Parliament Magazine, 423, 40-41, 2015
[Buc15a] R. Buchty: Robots on the rise -- one year into the R5-COP project. ARTEMIS news, 2015
[MWB15] R. Meyer, J. Wagner, R. Buchty, and M. Berekovic: Universal Scripting Interface for SystemC. DVCon Europe Conference Proceedings 2015, 2015
[SBB15] P. Siegl, R. Buchty, and M. Berekovic: Revealing Potential Performance Improvements By Utilizing Hybrid Work-Sharing For Resource-Intensive Seismic Applications. Proceedings of the 23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2015, IEEE Computer Society, Turku, Finland 2015
[WMB15] J. Wagner, R. Meyer, R. Buchty, and M. Berekovic: A scriptable, standards-compliant reporting and logging extension for SystemC. Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2015 International Conference on, 2015
[BGS14] R. Buchty, M. Geelen, H. Sandee, and V. Beran: R5-COP: Reconfigurable ROS-based Resilient Reasoning Robotic Cooperating Systems. ARTEMIS Book of Projects Volume Three, ARTEMIS Joint Undertaking, 2014
[HMW14] S. A. Horsinka, R. Meyer, J. Wagner, R. Buchty, and M. Berekovic: On RTL to TLM Abstraction to Benefit Simulation Performance and Modeling Productivity in NoC Design Exploration. NoCArc14: Proceedings of the 2014 International Workshop on Network on Chip Architectures, ACM, 2014
[SMB14] T. Schuster, R. Meyer, R. Buchty, L. Fossati, and M. Berekovic: SoCRocket - A virtual platform for the European Space Agency`s SoC development. Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2014 9th International Symposium on, 2014
[ABB13] H. Al-Khalissi, R. Buchty, and M. Berekovic: Efficient Barrier Synchronization for OpenMP-Like Parallelism on the Intel SCC. ICPADS `13: Proceedings of the 2013 International Conference on Parallel and Distributed Systems, IEEE Computer Society, 2013
[MDA13] B. Motruk, J. Diemer, P. Axer, R. Buchty, and M. Berekovic: Safe Virtual Interrupts Leveraging Distributed Shared Resources and Core-to-Core Communication on Many-Core Platforms. PRDC `13: Proceedings of the 2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing, IEEE Computer Society, 2013
[MDB13] B. Motruk, J. Diemer, R. Buchty, and M. Berekovic: Power monitoring for mixed-criticality on a many-core platform. ARCS`13: Proceedings of the 26th international conference on Architecture of Computing Systems, Springer-Verlag, 2013
[WBS13] J. Wagner, R. Buchty, C. Schubert, and M. Berekovic: Designing a low-power wireless sensor node rASIP architecture. Signal Processing Systems (SiPS), 2013 IEEE Workshop on, 2013
[KNB12] M. Kicherer, F. Nowak, R. Buchty, and W. Karl: Seamlessly portable applications: Managing the diversity of modern heterogeneous systems. ACM Transactions on Architecture and Code Optimization (TACO), 8, 2012
[MDB12] B. Motruk, J. Diemer, R. Buchty, R. Ernst, and M. Berekovic: IDAMC: A Many-Core Platform with Run-Time Monitoring for Mixed-Criticality. HASE `12: Proceedings of the 2012 IEEE 14th International Symposium on High-Assurance Systems Engineering, IEEE Computer Society, 2012
[BHK11] R. Buchty, V. Heuveline, W. Karl, and J.-P. Weiß: A survey on hardware-aware and heterogeneous computing on multicore processors and accelerators. Concurrency and Computation: Practice and Experience, 2011
[BuW11] R. Buchty and J.-P. Weiß: High-performance and Hardware-aware Computing, Proceedings of the First International Workshop on New Frontiers in High-performance and Hardware-aware Computing (HipHaC`11). KIT Scientific Publishing, 2011
[KBK11] M. Kicherer, R. Buchty, and W. Karl: Cost-aware function migration in heterogeneous systems. Proceedings of the 6th International Conference on High Performance and Embedded Architectures and Compilers, ACM, 2011
[KBK11a] D. Kramer, R. Buchty, and W. Karl: A Light-Weight Approach for Online State Classification of Self-organizing Parallel Systems. Architecture of Computing Systems - ARCS 2011, Springer Berlin / Heidelberg, 2011
[KBK11b] D. Kramer, R. Buchty, and W. Karl: Monitoring and Self-awareness for Heterogeneous, Adaptive Computing Systems. Organic Computing — A Paradigm Shift for Complex Systems (10.1007/978-3-0348-0130-0_10), Springer Basel, 2011
[KNB10] M. Kicherer, F. Nowak, R. Buchty, and W. Karl: Extending a Light-weight Runtime System by Dynamic Instrumentation For Performance Evaluation. ARCS 2010 Workshop Proceedings, VDE, 2010
[NKB10] F. Nowak, M. Kicherer, R. Buchty, and W. Karl: Delivering Guidance Information in Heterogeneous Systems. ARCS 2010 Workshop Proceedings, VDE, 2010
[BKK09] R. Buchty, D. Kramer, M. Kicherer, and W. Karl: A Light-weight Approach to Dynamical Runtime Linking Supporting Heterogenous, Parallel, and Reconfigurable Architectures. Architecture of Computing Systems -- ARCS 2009, 22nd International Conference (LNCS 5455), Springer, 2009
[BKK09a] R. Buchty, M. Kicherer, D. Kramer, and W. Karl: An Embrace-and-Extend Approach to Managing the Complexity of Future Heterogeneous Systems. SAMOS `09: Proceedings of the 9th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation, Springer-Verlag, 2009
[BKN09] R. Buchty, D. Kramer, F. Nowak, and W. Karl: A Seamless Virtualization Approach for Transparent Dynamical Function Mapping targeting Heterogeneous and Reconfigurable Systems. ARC2009 -- Proceedings of the 5th International Workshop on Applied Reconfigurable Computing (LNCS 5453), Springer, 2009
[KBK09] D. Kramer, R. Buchty, and W. Karl: A Scalable and Decentral Approach to sustained System Monitoring. Proceedings of ACACES 2009 Poster Abstracts: Advanced Computer Architecture and Compilation for Embedded Systems, Academia Press, Ghent 2009
[KVB09] D. Kramer, T. Vogel, R. Buchty, F. Nowak, and W. Karl: A general purpose HyperTransport-based Application Accelerator Framework. Proceedings of the First International Workshop on HyperTransport Research and Applications (WHTRA 2009) (ISBN 978-3-00-027249-3), Universitätsbibliotek Heidelberg, 2009
[MaB09] O. Mattes and R. Buchty: A Universal Framework for Simulating Hierarchical Network Topologies in a Distributed Memory System. Parallel-Algorithmen, -Rechnerstrukturen und -Systemsoftware, Gesellschaft für Informatik e.V., 2009
[MNB09] O. Mattes, F. Nowak, R. Buchty, and W. Karl: Augmenting the Curriculum targeting Hardware-aware System Design. CDNLive! EMEA 2009, Cadence Design Systems, Inc., 2009
[NBK09] F. Nowak, R. Buchty, D. Kramer, and W. Karl: Exploiting the HTX-Board as a Coprocessor for Exact Arithmetics. Proceedings of the First International Workshop on HyperTransport Research and Applications (WHTRA 2009) (ISBN 978-3-00-027249-3), Universitätsbibliotek Heidelberg, 2009
[BKK08] R. Buchty, D. Kramer, and W. Karl: An Organic Computing Approach to Sustained Real-time Monitoring. Proceedings of WCC2008/BICC (IFIP Vol.268) (ISBN 978-0-387-09654-4), Springer, 2008
[BMK08] R. Buchty, O. Mattes, and W. Karl: Self-aware Memory: Managing Distributed Memory in an Autonomous Multi-Master Environment. Architecture of Computing Systems -- ARCS 2008, 21st International Conference (ISBN 978-3-540-78152-3), 2008
[BuK08] R. Buchty and W. Karl: Design Aspects of Self-Organizing Heterogeneous Multi-Core Architectures. it Information Technology 5/2008 (Issue on Computer Architecture Challenges), 293-299, 2008
[BuW08] R. Buchty and J.-P. Weiß: High-performance and Hardware-aware Computing, Proceedings of the First International Workshop on New Frontiers in High-performance and Hardware-aware Computing (HipHaC`08). Universitätsverlag Karlsruhe, 2008
[NBK08] F. Nowak, R. Buchty, and W. Karl: Adaptive Cache Infrastructure: Supporting dynamic Program Changes following dynamic Program Behavior. Proceedings of the 9th Workshop on Parallel Systems and Algorithms (PASA 2008) (ISBN 978-3-88579-218-5), GI e.V, 2008
[TKN08] J. Tao, M. Kunze, F. Nowak, R. Buchty, and W. Karl: Performance Advantage of Reconfigurable Cache Design on Multicore Processor Systems. International Journal of Parallel Programming, 36(3), 2008
[NBK07] F. Nowak, R. Buchty, and W. Karl: A Run-time Reconfigurable Cache Architecture. Proceedings of the ParaFPGA-Symposium (Parallel Computing with FPGAs), 2007
[TSJ07] J. Tao, A. Shahbahrami, B. Juurlink, R. Buchty, W. Karl, and S. Vassiliadis: Optimizing Cache Performance of the Discrete Wavelet Transform Using a Visualization Tool. Proceedings of the 2007 IEEE International Symposium on Multimedia (ISM-07), 2007
[BTK06] R. Buchty, J. Tao, and W. Karl: Automatic Data Locality Optimization through Self-Optimization. Self-Organising Systems: First International Workshop (IWSOS2006), LNCS4124 (ISBN 3-540-37658-5), Springer-Verlag, Berlin--Heidelberg 2006
[Buc06] R. Buchty: Reconfigurable Architectures and Instruction Sets: Programmabilty, Code Generation, and Program Execution. Proceedings of the Dagstuhl Seminar 06141 "Reconfigurable Architectures”, 2006
[BuK06] R. Buchty and W. Karl: A Monitoring Infrastructure for the Digital on-demand Computing Organism (DodOrg). Self-Organising Systems: First International Workshop (IWSOS2006), LNCS4124 (ISBN 3-540-37658-5), Springer-Verlag, Berlin--Heidelberg 2006
[BuK06a] R. Buchty and W. Karl: A Monitoring Infrastructure for the Digital on-demand Computing Organism (DodOrg). Advanced Computer Architecture and Compilation for Embedded Systems (ACACES 2006) (ISBN 90-382-0981-9), Academia Press, Ghent 2006
[LBK06] H.-P. Löb, R. Buchty, and W. Karl: A Network Agent for Diagnosis and Analysis of Real-time Ethernet Networks. International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2006) (ISBN 1-59593-543-6), ACM Press, New York 2006
[ABT05] G. Acher, R. Buchty, and C. Trinitis: CPU-independent Assembler in an FPGA. Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL05) (ISBN 0-7803-9362-7), IEEE CS, 2005
[BAJ05] R. Buchty, G. Acher, J. Jeitner, W. Karl, J. Tao, and C. Trinitis: ASoCS: An Architecture Concept for Self-optimizing Parallel and Distributed Computer Systems. PARS Workshop Proceedings, GI/ITG, 2005
[BHO04] R. Buchty, N. Heintze, and D. Oliva: Modelling Cryptonite: On the Design of a Programmable High-Performance Crypto Processor. PARS Newsletter #2 (ISSN 0177-0454), 2004
[BHO04a] R. Buchty, N. Heintze, and D. Oliva: A Programmable Crypto Processor Architecture for High-Bandwidth Applications. ARCS2004 International Conference on Architecture of Computing Systems Proceedings (LNCS2981) (ISBN 3-650-21238-8), 2004
[BHO04b] R. Buchty, N. Heintze, and D. Oliva: Modelling Cryptonite: On the Design of a Programmable High-Performance Crypto Processor. ARCS2004 Organic and Pervasive Computing Workshop Proceedings (LNI P-41) (ISBN 3-88579-370-9), 2004
[OBH03] D. Oliva, R. Buchty, and N. Heintze: AES and the Cryptonite Crypto Processor. CASES`03 Conference Proceedings, 2003